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2 results for “memory architecture”

Shanghai AI Lab open-sources Intern-S2 with plug-and-play Memory Decoder for scientific tasks
Technology 15 Sep 2026

Shanghai AI Lab open-sources Intern-S2 with plug-and-play Memory Decoder for scientific tasks

Shanghai AI Lab open-sourced Intern-S2 with a plug-and-play Memory Decoder for science tasks. Weights are on Hugging Face; closed-model parity claims stay lab-reported only.

slvDev Runs 28.9M-Parameter LLM at 9.88 Tokens/Second on $10 ESP32-S3 Microcontroller
Technology 09 Aug 2026

slvDev Runs 28.9M-Parameter LLM at 9.88 Tokens/Second on $10 ESP32-S3 Microcontroller

A developer known as slvDev has demonstrated a 28.9-million-parameter language model generating text at 9.88 tokens per second on an ESP32-S3. Running a language model on a sub-$10 microcontroller changes the cost floor for local AI.

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