Huawei said Thursday it will bring its next-generation Ascend 960DT AI chip to market in the first quarter of 2027, pulling the launch forward from a previous Q3 2027 target. The company disclosed the updated timeline at its Huawei Connect conference, where rotating and acting chairman David Wang announced the acceleration.
A Huawei spokesperson confirmed the new schedule, stating the Ascend 960DT is expected to be ready in Q1 2027 and that Ascend 960 chips are launching ahead of schedule, doubling performance and advancing year by year. The announcement arrives days before U.S. President Trump and Chinese President Xi Jinping are set to meet in Washington, DC on September 24.
Huawei is building its Peerium Computing Architecture around UnifiedBus, a proprietary interconnect linking processors with memory, storage, and networking. The first systems based on the architecture are the Atlas 950 SuperPoD and SuperCluster. The company says an Atlas 950 SuperCluster can connect up to 256,000 accelerator cards, and rotating chairman Eric Xu said the architecture is designed for both training and inference.
China tech analyst Rui Ma noted on X that Huawei had previously said its Atlas 960 SuperPoD would scale to 15,488 Ascend 960 chips, while this week's announcement referred to a system with 4,096 chips. Ma wrote that the chip itself is coming much earlier, but the SuperPoD announced is much smaller than originally laid out. She added that U.S. restrictions are unlikely to stop China from pursuing its own semiconductor technology because the stakes for self-sufficiency are too high.
Confirmed
- Huawei said Ascend 960DT launch moved to Q1 2027 from Q3 2027.
- Peerium Computing Architecture uses UnifiedBus to link processors, memory, storage, and networking.
- Atlas 950 SuperPoD and SuperCluster are the first systems based on the architecture.
- According to Huawei, Atlas 950 SuperCluster can connect up to 256,000 accelerator cards.
- Architecture targets both training and inference workloads.
Unknown
- Detailed specifications for the Ascend 960DT (process node, TFLOPS, memory bandwidth, power envelope).
- Independent performance verification versus Nvidia's current and upcoming data-center GPUs.
- Volume production yields and supply-chain resilience under ongoing U.S. export controls.
- Whether the 256,000-card SuperCluster scale is achievable in customer deployments or remains a reference design.
- Exact timing and scope of the previously mentioned Atlas 960 SuperPoD scaling to 15,488 chips versus the 4,096-chip system referenced this week.
Our take
Huawei's timeline compression signals confidence in its domestic supply chain, but the gap between a single-chip launch and a validated 256,000-card cluster remains wide. The reduced SuperPoD scale — 4,096 chips versus the earlier 15,488 target — suggests system-level integration, not just silicon, is the pacing item. Until independent benchmarks and customer deployments appear, the 2027 date is a milestone, not a proven alternative to Nvidia's roadmap.
