PyTorch Foundation published the Core PyTorch track for PyTorch Conference North America 2026, scheduled for October 20–21 in San Jose, California. The program focuses on compiler and runtime internals, distributed communication, device portability, release engineering, CI infrastructure, and observability across PyTorch and adjacent projects including vLLM, DeepSpeed, Ray, and Safetensors.

Super Early Bird registration runs through September 4, 2026. The full schedule is on the conference site; the sessions below are the Core PyTorch highlights infrastructure and framework teams are most likely to watch.

What's new

Release engineering and compatibility

  • Scaling PyTorch's Compatibility Promise: A Tiered Cross-Repository CI Relay for Out-of-Tree Backends (Subin George and Jewel K M, Red Hat) — Lightning, Oct 20, 12:00–12:10 p.m. Presents the Cross-Repository CI Relay with a four-tier trust model from event dispatch through blocking merge prerequisites. Deployment with Ascend NPU and RISC-V backends reportedly cuts breakage detection from days to minutes.
  • Shipping PyTorch and Its Ecosystem: A Modern Release Story (Andrey Talman, Meta) — Lightning, Oct 20, 11:45–11:55 a.m. Covers a faster release cadence, continuous validation of Triton and vLLM against PyTorch nightlies, and AI agents that triage CI noise and draft fixes.
  • Clearing the Path Towards an ABI Stable PyTorch C++ Extension Ecosystem (Sean McGovern and Chris Leonard, Red Hat; Jane Xu, Meta) — Breakout, Oct 21, 2:15–2:40 p.m. Demonstrates tooling to inventory unstable API usage and migrate extensions, with demonstrations on libraries including vLLM and SGLang.

Compiler, runtime, and inference serving

  • From Backed to Unbacked: Sound, Predictable, and Controllable Dynamic Shapes in PyTorch (Laith Sakka, Meta) — Breakout, Oct 21, 4:20–4:45 p.m. Introduces unbacked shapes that disallow implicit guards on dynamic dimensions for vLLM, export, pre-compilation, and JIT deployments where recompilation is unacceptable.
  • Parametrized Dynamic Shape CUDA Graphs (Elias Ellison, Meta; Daniel Galvez, NVIDIA) — Breakout, Oct 21, 11:45 a.m.–12:10 p.m. Combines parametrized CUDA Graphs with torch.compile symbolic tracing to capture one graph across dynamic shapes, reporting lower cold-start times for inference serving.
  • Speeding Up torch.compile: A New FakeTensor (Angel Li, Meta) — Lightning, Oct 21, 4:55–5:05 p.m. Reports FakeTensor propagation taking roughly 20% of Dynamo tracing time and a C++ FakeTensor showing a 30× speedup for aten.mm versus the Python implementation.

Distributed communication and device portability

  • Future of Distributed Communication in PyTorch: New APIs for Fault Tolerance, RDMA and Extensibility (Tristan Rice and Kapil Sharma, Meta) — Breakout, Oct 20, 4:20–4:45 p.m. Presents torch.distributed.reconfigure() for live process-group recovery after rank failures, Window APIs for one-sided put/get, and pip-installable backends registered through entry points.
  • rocSHMEM Symmetric Memory in PyTorch for AMD GPUs (Prachi Gupta, AMD) — Lightning, Oct 20, 4:35–4:45 p.m. Extends PyTorch symmetric memory to AMD GPUs via rocSHMEM in upstream PyTorch, with Triton-callable primitives and a backend-agnostic layer shared with NVSHMEM.

Why it matters

The Core PyTorch track shows where maintainers are spending effort ahead of October: collapsing out-of-tree integration from days to minutes via cross-repo CI, stabilizing the C++ extension surface for vLLM-class stacks, and closing compile-time bottlenecks (FakeTensor, unbacked shapes, parametrized CUDA Graphs) that still block production inference. For teams on alternate accelerators, the relay and device-portability sessions define what “compatible” will mean on the next release cycle.

Our take

Meta still owns most of the compiler agenda—unbacked shapes, FakeTensor, nested graph breaks—because torch.compile remains the gating item for dynamic inference. Red Hat and Huawei’s CI-relay work matters more to vendors than to application developers, but it sets the integration clock for every non-CUDA backend. If agent-assisted triage actually keeps release cadence predictable through the conference PR surge, that may matter as much as any single runtime optimization on the schedule.

Sources