22 results for “Lancium”
Nvidia has agreed to invest up to $3 billion in Lancium, the Texas-based power infrastructure developer behind the first operational site of the Stargate. Power has replaced silicon as the scarcest resource in frontier AI development.
NVIDIA submitted its first MLPerf Inference v6.1 preview results for Vera Rubin NVL72, showing up to 3.7x higher throughput than GB300 NVL72 on Qwen3-VL. The numbers signal a leap for rack-scale inference on MoE models.
NVIDIA says Groq 3 LPX's deterministic execution cuts voltage droop by over 60% on Vera Rubin, yielding a low-double-digit power reduction for the same inference workload.
NVIDIA detailed NVLink 6's five-layer resiliency stack for lossless AI-factory fabrics. In NVIDIA's internal testing, Shadow Engine Recovery cut B200 inference downtime from 283s to 7.3s.
Andon Labs says GPT-6 Astra averaged $15,515 in its Vending-Bench 2 simulation, nearly triple Claude Fable 5.1's result. The test suggests long-horizon discipline, not raw reasoning, is the next agent battleground.
NVIDIA took a minority stake in data-center site developer Cloverleaf Infrastructure to accelerate AI factory construction across the U.S. The partnership integrates NVIDIA's DSX platform early in site design to maximize compute output per megawatt.
NVIDIA released CUDA Toolkit 13.4 with native Windows on Arm support and a Rubin architecture preview. This gives developers a runway to port CUDA-dependent AI and content apps to Arm64 Windows.
NVIDIA launched DSX MaxLPS, a full-stack platform that dynamically reallocates stranded power across GPU racks to fit up to 40% more compute in the same facility envelope. The system combines real-time power steering, workload-aware profiles, and 45°C liquid cooling to boost performance per watt by 1.3–1.5x on Blackwell and Vera Rubin systems.
NVIDIA published a tutorial showing how KAI Scheduler and vCluster let three teams share one L40S GPU while each gets an isolated Kubernetes control plane. The pattern scales to thousands of nodes and gives platform teams a way to consolidate GPU hardware without sacrificing tenant autonomy.
d-Matrix will connect its Raptor XPUs to NVIDIA's AI platform using NVLink Fusion. This gives the inference chipmaker a validated rack-scale path without building infrastructure from scratch.
Industry reports say Micron is pushing High Bandwidth Memory capacity toward roughly 100,000 wafers a month by end-2026 — about double last year’s estimated run rate — while lifting 12-high HBM4 share for NVIDIA’s Vera Rubin. Micron has not issued a matching September IR confirmation of the wafer target.
NVIDIA published Day-0 FP8 inference results for Alibaba's 2.4T-parameter Qwen3.8-2.4T-A95B on the GB300 NVL72 rack, hitting over 4,000 tokens per second per GPU. The result demonstrates that rack-scale NVLink can absorb MoE all-to-all traffic at frontier model scale.