24 results for “interconnect”
NVIDIA detailed NVLink 6's five-layer resiliency stack for lossless AI-factory fabrics. In NVIDIA's internal testing, Shadow Engine Recovery cut B200 inference downtime from 283s to 7.3s.
Emerald AI, Google and NVIDIA launched the AI Energy Management Alliance to accelerate flexible data centers that adjust power use dynamically, aiming to speed grid interconnections and cut electricity costs.
NVIDIA launched NVLink Fusion with NVHBM on August 26, 2026, giving hyperscalers a standardized path to deploy custom XPUs alongside NVIDIA GPUs. The co-designed memory and interconnect stack promises 30% higher bandwidth, 25% more compute area, and 15% lower HBM power versus standard HBM4e.
NVIDIA showcased five Inception startups using its AI platforms to accelerate clean energy at Climate Week. The projects cut grid study times, streamline nuclear ops, and compress fusion development from years to weeks.
Huawei moved its Ascend 960DT AI chip launch to Q1 2027, pulling the schedule forward by six months. The acceleration sharpens the competitive pressure on Nvidia in the Chinese data-center market.
Google and the UN launched the UN System Data Commons, an open AI-ready platform unifying global statistics into a single searchable knowledge graph.
NVIDIA submitted its first MLPerf Inference v6.1 preview results for Vera Rubin NVL72, showing up to 3.7x higher throughput than GB300 NVL72 on Qwen3-VL. The numbers signal a leap for rack-scale inference on MoE models.
NVIDIA’s DSX bet is tokens per megawatt: Lambda reports 24% more HGX B200 throughput at 85% power. Eos + Emerald cut 4 MW to 3 MW for the grid — Flex-pattern proof, not a shipped DSX Flex site.
NVIDIA took a minority stake in data-center site developer Cloverleaf Infrastructure to accelerate AI factory construction across the U.S. The partnership integrates NVIDIA's DSX platform early in site design to maximize compute output per megawatt.
d-Matrix will connect its Raptor XPUs to NVIDIA's AI platform using NVLink Fusion. This gives the inference chipmaker a validated rack-scale path without building infrastructure from scratch.
IBM unveiled a modular cryogenic architecture that connects box-shaped cooling cells to link multiple quantum processors. The design supports at least 2,000 qubits per cell and underpins the company's 2029 fault-tolerant quantum computer target.
NVIDIA unveiled NVLink Fusion, letting hyperscalers plug custom XPUs into its 72‑XPU NVLink domain and MGX rack architecture. The program cuts non‑differentiated engineering so silicon teams can ship custom accelerators faster while reusing proven power, cooling, and cluster software.